I. Field of the Disclosure
The technology of the disclosure relates generally to processing of computer instructions in integrated circuit-based systems.
II. Background
A synchronous digital circuit, such as a central processing unit (CPU) of a computer system, is typically integrated onto a semiconductor die, and may comprise a number of functional blocks encompassing a wide variety of functional elements. Each functional block of the circuit may be operated at one of a variety of performance levels associated with a supply voltage and a corresponding clock frequency, where the clock frequency is a maximum frequency at which the circuit is able to operate properly at the supply voltage. It is well known in the art that a higher supply voltage for a functional block of an integrated circuit may result in a higher maximum clock frequency, and that each clocked operation carried out by the functional block consumes more energy per operation at a higher supply voltage than at a lower supply voltage. Accordingly, in order to maximize energy efficiency of operations to be performed, it is desirable to set a performance level of the functional block to a performance level high enough to satisfy requirements of the computational task, but no higher.
However, in a practical integrated circuit, it may not be possible to set the performance level of a functional block to an arbitrary, optimal performance level. For instance, an integrated circuit may be capable of natively generating only certain set voltages and/or frequencies, corresponding to discrete performance levels that are either lower or higher than the optimal performance level. As a result, the performance level at which the functional block must operate may be either insufficient to satisfy the performance requirements of the operations to be performed, or else may exceed the performance requirements of the operations, thus resulting in an unnecessary expenditure of energy and processing resources.